Efficient Test Methodologies for High-Speed Serial Links

Efficient Test Methodologies for High-Speed Serial Links

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Efficient Test Methodologies for High-Speed Serial Links describes in detail several new and promising techniques for cost-effectively testing high-speed interfaces with a high test coverage. One primary focus of Efficient Test Methodologies for High-Speed Serial Links is on efficient testing methods for jitter and bit-error-rate (BER), which are widely used for quantifying the quality of a communication system. Various analysis as well as experimental results are presented to demonstrate the validity of the presented techniques.(Feb 2005) Clocking and circuit design for a parallel i/o on a first-generation CELL processor. ... Maxim Integrated Products (2004) Pattern Creator/Converter software User Manual, Application Note: HFAN-9.5.0, Available at www.maxim-ic. com 30. Oppenheim AV, Willsky ... (Jan 2005) 8-Gb/s source-synchronous I/O link with adaptive receiver equalization, offset cancellation, and clock de-skew. IEEE Janbsp;...


Title:Efficient Test Methodologies for High-Speed Serial Links
Author: Hong Dongwoo, Kwang-Ting Cheng
Publisher:Springer Science & Business Media - 2009-12-24
ISBN-13:

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